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Interrupt Source and Sink API

clear_irq()

int clear_irq()Prototype:

Verilog HDL: interrupt_bit

VHDL: interrupt_bit, bfm_id, req_if(bfm_id)

Arguments:

voidReturns:

Asserts the interrupt signal and sets the interrupt signal to 0,

regardless of the value you set for Assert IRQ high in the parameter

editor.

Description:

Verilog HDL, VHDLLanguage Support:

get_irq()

get_irq()Prototype:

Verilog HDL: None

VHDL: irq, bfm_id, req_if(bfm_id)

Arguments:

logic[AV_IRQ_W-1:0]voidReturns:

Returns the current value of the register holding the latched

interrupt signal.

Description:

Verilog HDL, VHDLLanguage Support:

get_version()

string get_version()Prototype:

Verilog HDL: None

VHDL: N.A.

Arguments:

StringReturns:

Returns BFM version as a string of three integers separated by

periods. For example, version 13.1 sp1 is encoded as "13.1.1".

Description:

Verilog HDLLanguage Support:

Avalon Interrupt Source and Interrupt Sink BFMs

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