
set_enable_c_error()
set_enable_c_error()Prototype:
Verilog HDL: Boolean
VHDL: N.A.
Arguments:
voidReturns:
Enables a coverage point that ensures test coverage of all bits of the error
signal. It is disabled when the error signal is not supported.
Description:
Verilog HDLLanguage support:
set_enable_c_error_in_middle_of_packet()
set_enable_c_error_in_middle_of_packet()Prototype:
Verilog HDL: Boolean
VHDL: N.A.
Arguments:
voidReturns:
Enables a coverage point that ensures test coverage for the assertion of the
error signal in the middle of a packet. It is disabled when the error signal
is not supported.
Description:
Verilog HDLLanguage support:
set_enable_c_idle_beat_between_packet()
set_enable_c_idle_beat_between_packet()Prototype:
Verilog HDL: Boolean
VHDL: N.A.
Arguments:
voidReturns:
Enables a coverage point that ensures test coverage for packet transactions
that own idle beats in between. It is disabled when packet transmission is
not supported.
Description:
Verilog HDLLanguage support:
Altera Corporation
Avalon-ST Monitor
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set_enable_c_error()
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