Altera PCI Compiler Manual do Utilizador descarregar pdf (Página 81)

Altera Corporation User Guide Version 11.1 3–7

October 2011

Functional Description

■ When both trdyn and irdyn are active, a data word is clocked from

the sending to the receiving device

■ The master device should retry the current transaction

■ The master device should stop the current transaction

■ The master device should abort the current transaction

Table 3–1 shows the control signal combinations possible on the PCI bus

during a PCI transaction. The PCI MegaCore function processes the PCI

signal assertion from the local side. Therefore, the PCI MegaCore

function only drives the control signals per the PCI Local Bus Specification,

Revision 3.0. The local-side application can force retry, disconnect, abort,

successful data transfer, and target wait state cycles to appear on the PCI

bus by driving the lt_rdyn, lt_discn, and lt_abortn signals to

certain values. Refer to “Target Transaction Terminations” on page 3–77

for more details.

Table 3–1. Control Signal Combination Transfer

Type devseln trdyn stopn irdyn

Claim transaction Assert Don’t care Don’t care Don’t care

Retry (1) Assert De-Assert Assert Don’t care

Disconnect with data Assert Assert Assert Assert

Disconnect without data Assert De-assert Assert Don’t care

Abort (2) De-assert De-assert Assert Don’t care

Successful transfer Assert Assert De-assert Assert

Target wait state Assert De-assert De-assert Assert

Master wait state Assert Assert De-assert De-assert

Notes to Ta b le 3 – 1:

(1) A retry occurs before the first data phase.

(2) A device must assert the devseln signal for at least one clock before it signals an abort.

1 2 ... 76 77 78 79 80 81 82 83 84 85 86 ... 359 360

Sem comentários

Altera PCI Compiler Manual do Utilizador Página 81