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Altera Corporation User Guide Version 11.1 4–1

October 2011

4. Testbench

General

Description

The Altera PCI testbench facilitates the design and verification of systems

that implement the Altera pci_mt64, pci_mt32, pci_t64, and

pci_t32 MegaCore functions. You can build a PCI behavioral

simulation environment by using the components of the PCI testbench,

an IP functional simulation model of any Altera PCI MegaCore function,

and your VHDL or Verilog HDL application design. Figure 4–1 shows the

block diagram of the PCI testbench. The shaded blocks are provided with

the PCI testbench.

Figure 4–1. Altera PCI Testbench Block Diagram

To use the PCI testbench, you should have a basic understanding of PCI

bus architecture and operations.This document describes the features

and applications of the PCI testbench to help you successfully design and

verify your application design.

Bus

Monitor

Clock Generator

Arbiter

Pull Ups

Reference

Design

PCI Bus

Altera PCI Testbench

Master

Transactor

Target

Transactor

Testbench Modules

IP Functional

Simulation Model

of an Altera PCI

MegaCore

Function

Altera Device

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