Altera Arria V GX FPGA Development Board Manual do Utilizador descarregar pdf (Página 59)

Chapter 2: Board Components 2–49

Components and Interfaces

November 2013 Altera Corporation Arria V GX FPGA Development Board

Reference Manual

Table 2–47 lists the HSMC connector component reference and manufacturing

information.

SFP+ Module

The development board include two SFP+ modules that use transceiver channels

from the FPGA. These modules takes in serial data from the FPGA and transform

them into optical signals. The Arria V GX FPGA development board includes one

SFP+ cage assembly for the SFP+ port that is used by the device.

1 The second SFP+ port is active and includes the SFP+ cage assembly only when the

Arria V GT FPGA device is installed.

Table 2–48 lists the SFP+ module interface pin assignments, signal names, and

functions.

146

HSMB_RX_D_N15

AU28 LVDS or 2.5-V LVDS RX bit 15n or CMOS bit 71

149

HSMB_TX_D_P16

AP33 LVDS or 2.5-V LVDS TX bit 16 or CMOS bit 72

150

HSMB_RX_D_P16

AT30 LVDS or 2.5-V LVDS RX bit 16 or CMOS bit 73

151

HSMB_TX_D_N16

AN33 LVDS or 2.5-V LVDS TX bit 16n or CMOS bit 74

152

HSMB_RX_D_N16

AR30 LVDS or 2.5-V LVDS RX bit 16n or CMOS bit 75

155

HSMB_CLK_OUT_P2

AE26 LVDS or 2.5-V LVDS or CMOS clock out 2 or CMOS bit 76

156

HSMB_CLK_IN_P2

AU32 LVDS or 2.5-V LVDS or CMOS clock in 2 or CMOS bit 77

157

HSMB_CLK_OUT_N2

AD26 LVDS or 2.5-V LVDS or CMOS clock out 2 or CMOS bit 78

158

HSMB_CLK_IN_N2

AT32 LVDS or 2.5-V LVDS or CMOS clock in 2 or CMOS bit 79

160

HSMB_PRSNTN

AT24 2.5-V CMOS HSMC port B presence detect

Table 2–46. HSMC Port B Pin Assignments, Schematic Signal Names, and Functions (Part 4 of 4)

Board

Reference (J2) Schematic Signal Name

Arria V GX

FPGA

Pin Number

I/O Standard Description

Table 2–47. HSMC Connector Component Reference and Manufacturing Information

Board Reference Description Manufacturer

Manufacturing

Part Number

Manufacturer

Website

J1, J2

HSMC, custom version of QSH-DP

family high-speed socket.

Samtec ASP-122953-01 www.samtec.com

Table 2–48. SFP+ Pin Assignments, Schematic Signal Names, and Functions (Part 1 of 2)

Board

Reference (J10)

Schematic Signal Name

Arria V GX FPGA

Pin Number

I/O Standard Description

SFP_MOD_ABS1

AK16 1.5-V PCML Module present indicator

SFP_OP_RX_LOS1

AN19 1.5-V PCML Signal present indicator

SFP_OP_TX_FLT1

AG17 1.5-V PCML Transmitter fault indicator

SFP_RX_N1

Y38 1.5-V PCML Receiver data

SFP_RX_P1

Y39 1.5-V PCML Receiver data

SFP_SCL1

AL18 1.5-V PCML Serial 2-wire clock

1 2 ... 54 55 56 57 58 59 60 61 62 63 64 ... 89 90

Comentários a estes Manuais

Sem comentários

Altera Arria V GX FPGA Development Board Manual do Utilizador Página 59

Comentários a estes Manuais

Manuais e produtos relacionados com Instrumentos de medida Altera Arria V GX FPGA Development Board