Altera Arria V GX FPGA Development Board Manual do Utilizador descarregar pdf (Página 56)

2–46 Chapter 2: Board Components

Components and Interfaces

Arria V GX FPGA Development Board November 2013 Altera Corporation

Reference Manual

Table 2–46 lists the HSMC port B interface pin assignments, signal names, and

functions.

143

HSMA_TX_D_P15

AR13 LVDS or 2.5-V LVDS TX bit 15 or CMOS bit 68

144

HSMA_RX_D_P15

AE13 LVDS or 2.5-V LVDS RX bit 15 or CMOS bit 69

145

HSMA_TX_D_N15

AP13 LVDS or 2.5-V LVDS TX bit 15n or CMOS bit 70

146

HSMA_RX_D_N15

AE14 LVDS or 2.5-V LVDS RX bit 15n or CMOS bit 71

149

HSMA_TX_D_P16

AJ12 LVDS or 2.5-V LVDS TX bit 16 or CMOS bit 72

150

HSMA_RX_D_P16

AG13 LVDS or 2.5-V LVDS RX bit 16 or CMOS bit 73

151

HSMA_TX_D_N16

AH12 LVDS or 2.5-V LVDS TX bit 16n or CMOS bit 74

152

HSMA_RX_D_N16

AF13 LVDS or 2.5-V LVDS RX bit 16n or CMOS bit 75

155

HSMA_CLK_OUT_P2

AM7 LVDS or 2.5-V LVDS or CMOS clock out 2 or CMOS bit 76

156

HSMA_CLK_IN_P2

AR6 LVDS or 2.5-V LVDS or CMOS clock in 2 or CMOS bit 77

157

HSMA_CLK_OUT_N2

AL7 LVDS or 2.5-V LVDS or CMOS clock out 2 or CMOS bit 78

158

HSMA_CLK_IN_N2

AP6 LVDS or 2.5-V LVDS or CMOS clock in 2 or CMOS bit 79

160

HSMA_PSNTN

AW15 2.5-V CMOS HSMC port A presence detect

Table 2–45. HSMC Port A Pin Assignments, Schematic Signal Names, and Functions (Part 4 of 4)

Board

Reference (J1)

Schematic Signal Name

Arria V GX

FPGA

Pin Number

I/O Standard Description

Table 2–46. HSMC Port B Pin Assignments, Schematic Signal Names, and Functions (Part 1 of 4)

Board

Reference (J2) Schematic Signal Name

Arria V GX

FPGA

Pin Number

I/O Standard Description

HSMB_TX_P3

AT3 1.5-V PCML Transceiver TX bit 3

HSMB_RX_P3

AU1 1.5-V PCML Transceiver RX bit 3

HSMB_TX_N3

AT4 1.5-V PCML Transceiver TX bit 3n

HSMB_RX_N3

AU2 1.5-V PCML Transceiver RX bit 3n

HSMB_TX_P2

AP3 1.5-V PCML Transceiver TX bit 2

HSMB_RX_P2

AR1 1.5-V PCML Transceiver RX bit 2

HSMB_TX_N2

AP4 1.5-V PCML Transceiver TX bit 2n

HSMB_RX_N2

AR2 1.5-V PCML Transceiver RX bit 2n

HSMB_TX_P1

AM3 1.5-V PCML Transceiver TX bit 1

HSMB_RX_P1

AN1 1.5-V PCML Transceiver RX bit 1

HSMB_TX_N1

AM4 1.5-V PCML Transceiver TX bit 1n

HSMB_RX_N1

AN2 1.5-V PCML Transceiver RX bit 1n

HSMB_TX_P0

AK3 1.5-V PCML Transceiver TX bit 0

HSMB_RX_P0

AL1 1.5-V PCML Transceiver RX bit 0

HSMB_TX_N0

AK4 1.5-V PCML Transceiver TX bit 0n

HSMB_RX_N0

AL2 1.5-V PCML Transceiver RX bit 0n

HSMB_SDA

AG25 2.5-V CMOS Management serial data

HSMB_SCL

AH26 2.5-V CMOS Management serial clock

JTAG_TCK

AV34 2.5-V CMOS JTAG clock signal

1 2 ... 51 52 53 54 55 56 57 58 59 60 61 ... 89 90

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