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2–4 Reference Manual Altera Corporation
Cyclone II DSP Development Board August 2006
Components & Interfaces
Table 2–1 describes the major components on the Cyclone II DSP
development board and the related interfaces.
Table 2–1. Cyclone II DSP Development Board Components & Interfaces (Part 1 of 5)
Board Reference Name Description Page
Featured Device 2–9
U12 Cyclone™ II FPGA EP2C70F672-C6 2–9
User Interfaces 2–9
D2, D3, D4, D5, D6, D7,
D8, D9
User-defined LEDs Eight user-defined LEDs. 2–10
S1 User-defined DIP
switch
One User-defined octal DIP switch. 2–11
SW2, SW3, SW4, SW5 User-defined
push-button switches
User-defined momentary-contact push-button
switches.
2–12
U32, U33 Dual seven-segment
display
Dual seven-segment display. 2–13
J10 Line-in audio jack Audio input connector for line-in (2.5 mm). 2–14
J14 Line-out audio jack Audio output connector for line-out (2.5 mm).
J16 Headphone jack Amplified audio output connector for
headphones (2.5 mm).
U11 Audio CODEC
converter
Texas Instruments TLV320AIC23 96 kHz stereo
audio CODEC.
2–14
J21 VGA output
connector
VGA output connector (DB-15). 2–15
U21 VGA triple video D/A
output converter
Fairchild FMS3818 triple video D/A output
converter.
2–15
J31 (Channel A)
J43 (Channel B)
D/A converter output
SMA connector
SMA connector which is driven by the output of
the Channel A D/A converter (U25).
2–17
J26 (Channel A & B) D/A converter CLK
SMA connector
SMA connector for an external D/A converter
clock input to U25.
2–62
U25 (Channel A)
U30 (Channel B)
D/A converter Texas Instruments DAC904E 14-bit
digital-to-analog (D/A) converter.
2–17
J32 (Channel A)
J44 (Channel B)
A/D converter input
SMA connector
SMA connector which drives the Channel A A/D
converter (U26).
2–21
J27 (Channel A & B) A/D converter CLK
SMA connector
SMA connector for an external A/D converter
clock input to U26.
2–62
U26 (Channel A)
U31 (Channel B)
A/D converter Texas Instruments ADS5520 12-bit 125 MSPS
analog-to-digital (A/D) converter.
2–22
- Reference Manual 1
- MNL-CII012805-1.1 2
- Contents 3
- About This Manual 5
- Typographic 6
- Conventions 6
- Chapter 1. Introduction 7
- Features Overview 8
- Chapter 2. Cyclone II DSP 9
- Development 9
- Board Components 9
- Components & Interfaces 10
- USER EPCS (U36) 11
- (Flash Memory) 11
- Expansion Connectors 13
- General Connectors 13
- DIMM_SYNC_CLK) is a 14
- CONFIG_DONEn is asserted) 15
- Featured Device 17
- User Interfaces 17
- Closed Position 19
- Open Position 19
- USER_PB3 AE14 20
- USER_PB2 AE22 20
- USER_PB1 AE16 20
- USER_PB0 AC18 20
- Audio CODEC Converter (U11) 22
- Audio Jacks (J10, J14, J16) 22
- VGA Output Connector (J21) 23
- D/A Converter (U25 & U30) 25
- D/A Converter Clocks 26
- CLK_OSC_DACA (Channel A) 27
- CLK_OSC_DACB (Channel B) 27
- FPGA_TO_DAC_CLK 27
- SMA_TO_DAC_CLK 27
- Note to Table 2–13: 28
- A/D Converter (U26 & U31) 30
- A/D Converter Clocks 31
- CLK_OSC_ADCA (Channel A) 32
- CLK_OSC_ADCB (Channel B) 32
- FPGA_TO_ADC_CLK 32
- SMA_TO_ADC_CLK 32
- Note to Table 2–18: 33
- Components 34
- DDR2 SDRAM DIMM Clocks 35
- Memory Components 36
- Note to Figure 2–12: 36
- EPCS Select (J29) 45
- Synchronous SRAM Device (U22) 47
- Note to Table 2–23: 49
- ■ EVM_CEn2 selects the SSRAM 50
- J15Pin 1 51
- Pin 1 Pin 1 51
- Notes to Figure 2–16: 52
- Note to Table 2–24: 55
- General 58
- Connectors 58
- Mictor Connector (J12) 61
- Notes to Figure 2–19: 62
- Note to Table 2–28: 64
- Status LEDs & 65
- Reset/Power 65
- Switches 65
- USER RESET 66
- SYS RESET 66
- Clock Circuitry 67
- Setting the Clocks 68
- CLK SMA Connector (J17) 69
- Clock Buffer (U16) 71
- Power Supply 72
- Power Plane 78
- Supplies 78
- Settings 78
- Appendix A. DDR2 SDRAM 79
- DIMM Connector Pin Out Table 79
- DIMM_DQS5 C12 C12 82
- DIMM_DQS6 B14 B14 82
- DIMM_DQS7 C17 C17 82
- DIMM_DQS8 B6 B6 82
- Appendix B. SSRAM 83
- Pin-Out Table 83
- Note to Ta ble B –1: 85
- Appendix C. Cyclone II EP2C70 87
- Device Pin-Out Table 87
- Appendix D. Restoring the 109
- Factory Design 109
- SAFE/USER Mode 110
- ASI Connector 111
- JTAG Cable 111
- Introduction 112
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