Altera Arria 10 Avalon-MM DMA Manual do Utilizador descarregar pdf (Página 12)

models (BFMs) driving the PCI Express link interface. Altera performs the following tests in the

simulation environment:

• Directed and pseudorandom stimuli are applied to test the Application Layer interface, Configuration

Space, and all types and sizes of TLPs

• Error injection tests that inject errors in the link, TLPs, and Data Link Layer Packets (DLLPs), and

check for the proper responses

• PCI-SIG

Compliance Checklist tests that specifically test the items in the checklist

• Random tests that test a wide range of traffic patterns

Altera provides example designs that you can leverage to test your PCBs and complete compliance base

board testing (CBB testing) at PCI-SIG, upon request.

Compatibility Testing Environment

Altera has performed significant hardware testing to ensure a reliable solution. In addition, Altera

internally tests every release with motherboards and PCI Express switches from a variety of manufac‐

turers. All PCI-SIG compliance tests are run with each IP core release.

Performance and Resource Utilization

Because the PCIe protocol stack is implemented in hardened logic, it uses no core device resources (no

ALMs and no embedded memory).

The Arria 10 variants include a soft logic bridge that functions as a front end to the hardened protocol

stack. The following table shows the typical expected device resource utilization for selected configura‐

tions using the current version of the Quartus II software targeting a Arria 10 device. With the exception

of M20K memory blocks, the numbers of ALMs and logic registers are rounded up to the nearest 50.

Table 1-6: Performance and Resource Utilization Arria 10 Avalon-MM DMA for PCI Express

Interface Width ALMs M20K Memory Blocks Logic Registers

128 1100 14 1650

256 1750 19 2600

Related Information

Fitter Resources Reports

Recommended Speed Grades

Recommended speed grades are pending characterization of production Arria 10 devices.

Related Information

• Area and Timing Optimization

• Altera Software Installation and Licensing Manual

1-8

Compatibility Testing Environment

UG-01145_avmm_dma

2015.05.14

Altera Corporation

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