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A–8 Getting Started User Guide Altera Corporation

Transceiver Signal Integrity Development Kit, Stratix II GX Edition June 2006

Design Walkthrough With Troubleshooting and Debugging Solutions

Troubleshooting Solutions

This section provides troubleshooting solutions. If your transaction is not

successful, review the following troubleshooting suggestions:

■ If the LED D1 is not illuminated, the system may not be receiving the

clock cycles. Ensure that the slide switch (S9) is in the oscillator

position (OSC). Also, ensure that switch 6 of the clock setting DIP

switch bank (S8) is set to OPEN.

■ If the LED D2 is not illuminated, the receiver cannot sync to the

transmitted data. To remedy this problem:

● Ensure that serial loopback is ON if external loopback is not

completed.

● If external loopback is completed, check the quality of the cables

used.

● Assert the system_reset push button switch.

■ If the LED D3 is not ON, the data checker did not receive the

expected data. To remedy this problem:

● Ensure that the data pattern of the DIP switch is set to PRBS7 or

PRBS23.

1 High frequency data patterns do not have a data checker.

Therefore, the LED D3 will be off when high frequency patterns

are used.

■ If the display shows EE, the DIP switch selection for PMA_controls

is not correct.

Debugging Using the SignalTap

II Embedded Logic Analyzer

In the kit’s Examples\SII_GX_SI_NonGUI_Design directory there is a

Quartus

II archive (.qar) file containing the example design project. The

design1.stp file is part of the .qar file and contains a variety of debugging

signals. The available signals are:

■ All resets going into the transceivers

■ Status signals from transceivers: rx_freqlocked,

rx_syncstatus

■ Input push button and DIP switch values

■ Reconfiguration block signals

● Inputs and outputs of VOD, preemphasis, equalization and DC

gain values

● Read, write, busy, and data valid signals

■ Data generator and checker signals

● Parallel data output to the transceiver

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