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7–6 Chapter 7: Testbench

Testbench Sequence

RapidIO II MegaCore Function August 2014 Altera Corporation

User Guide

SWRITE Transactions

The next set of operations performed are Streaming Writes (

SWRITE

). To perform

SWRITE

operations, one register in the IP core must be reconfigured as shown in

Table 7–2.

With the setting in Table 7–2, any write operation presented across the Input/Output

Avalon-MM slave interface on the rio module is translated to a RapidIO Streaming

Write transaction.

1 The Avalon-MM write address must map into

Input/Output Slave Window 0

However, in this example the window is set to cover the entire Avalon-MM address

space by setting the mask to all zeros.

The testbench generates a predetermined series of burst writes across the Avalon-MM

slave I/O interface on the DUT. These write bursts are each converted to an

SWRITE

request packet sent on the RapidIO serial interface. Because Streaming Writes only

support bursts that are multiples of a double word (multiple of 8 bytes), the testbench

cycles from 8 to

MAX_WRITTEN_BYTES

in steps of 8 bytes. The

ios_128_rd_wr_master_bfm

read_write_cmd

task generates and checks the streaming

write transaction.

At the sister_rio module, the

SWRITE

request packets are received and translated into

Avalon-MM transactions that are presented across the Input/Output master

Avalon-MM interface. The testbench calls the task

read_write_data

of the

sister_iom128_rd_wr_slave_bfm to capture the written data.

The written data is then checked against the expected value by running an

expect_1

task. After completing the

SWRITE

tests, the testbench performs

NREAD

operations.

NREAD Transactions

The next set of transactions tested are

NREAD

s. The DUT sends a group of

NREAD

transactions to the sister_rio module by cycling the read burst size from four to five in

increments of 16 bytes. For each iteration, the ios_128_rd_wr_master_bfm

read_write_cmd

and

read_data

tasks are called. The task performs the read request

packets across the I/O Avalon-MM Slave Read interface. The read transaction across

the Avalon-MM interface is translated into a RapidIO

NREAD

request packets.

Table 7–2. SWRITE Register

Module

Address

Name Value Description

rio 0x1040C

Input/Output

Slave Mapping

Window 0 Control

32'h00CD_0002

32'hCDCD_0002

Sets the

DESTINATION_ID

for outgoing transactions

to the value

0xCD

0xCDCD

, depending on the

device ID width of the sister_rio. This value matches

the base device ID of the sister_rio module. Enables

SWRITE

operations.

1 2 ... 195 196 197 198 199 200 201 202 203 204 205 ... 217 218

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