Altera Cyclone II PowerPlay Early Power Estimator Manual do Utilizador descarregar pdf (Página 21)

Altera Corporation 3–5

May 2006 PowerPlay Early Power Estimator User Guide For Cyclone II FPGAs

Using the Cyclone II PowerPlay Early Power Estimator

Figure 3–2. TFF Example

Figure 3–3. 4-Bit Counter Example

Figure 3–4 shows the Resource Usage Summary in the Quartus II

software Compilation Report for a design targeting the Cyclone II device

family. The Compilation Report provides the total number of LUTs and

registers used by the design.

PRN

CLRN

TFF

clock

INPUT

OUTPUT

tff output

PRN

CLRN

TFF

PRN

CLRN

TFF

PRN

CLRN

TFF

PRN

CLRN

TFF

cout2

cout1

cout0

clock

cout3

OUTPUT

cout0cout0

OUTPUT

cout3cout3

OUTPUT

cout2cout2

OUTPUT

cout1cout1

1 2 ... 16 17 18 19 20 21 22 23 24 25 26 ... 47 48

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Altera Cyclone II PowerPlay Early Power Estimator Manual do Utilizador Página 21