Altera Arria V SoC Development Board Manual do Utilizador descarregar pdf (Página 24)

2–16 Chapter 2: Board Components

Setup Elements

Arria V SoC Development Board July 2014 Altera Corporation

Reference Manual

Setup Elements

The development board includes several different kinds of setup elements. This

section describes the following setup elements:

■ Board settings DIP switch

■ JTAG chain control DIP switch

■ FPGA configuration mode DIP switch

■ HPS jumpers

■ CPU reset push button

■ MAX V reset push button

■ Program configuration push button

■ Program select push button

f For more information about the default settings of the DIP switches, refer to the

Arria V SoC Development Kit User Guide.

Board Settings DIP Switch

The board settings DIP switch (SW2) controls various features specific to the board

and the MAX V CPLD 5M2210 System Controller logic design. Table 2–7 lists the

switch controls and descriptions.

Table 2–7. Board Settings DIP Switch Controls

Switch Schematic Signal Name Description

CLK125A_EN

ON: Enable 125 MHz on-board oscillator

OFF: Disable 125 MHz on-board oscillator

Si570_EN

ON: Disable programmable oscillator

OFF: Enable programmable oscillator

FACTORY_LOAD

ON: Load the factory design from flash on power-up

OFF: PFL disabled. Do not load any design from flash on

power-up

SECURITY_MODE

ON: On-board USB-Blaster II sends FACTORY command on

power-up

OFF: On-board USB-Blaster II will not send FACTORY

command on power-up

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