Altera ALTPLL (Phase-Locked Loop) IP Core Manual do Utilizador Página 59
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DescriptionTypeParameter
Specifies, in picoseconds (ps), the phase shift for the
corresponding sclkout[1..0] port. The maximum phase
value is 7/8 of one VCO period. The VCO phase tap is
shared with the corresponding clock output port,
clk[1..0], and must have the same phase amount that is
less than one VCO period. In LVDS mode, this parameter
default value is 0.
StringSCLKOUT[]_PHASE_SHIFT
Specifies if the self-reset on gated-lock-loss feature is used.
Values are ON or OFF. If omitted, the default is OFF.
StringSELF_RESET_ON_GATED_LOSS_LOCK
Specifies if the self-reset on loss lock feature is used. Values
are ON or OFF. If omitted, the default is OFF.
StringSELF_RESET_ON_LOSS_LOCK
Specifies if the VCO is skipped. Values are ON or OFF. If
omitted, the default is OFF.
IntegerSKIP_VCO
Specifies, in picoseconds (ps), the modulation frequency
for spread spectrum. If omitted, the default is 0.
IntegerSPREAD_FREQUENCY
Specifies the modulus for the spread spectrum counter.
Provides direct access to the internal PLL parameters. If
the SS parameter is specified, all advanced parameters must
be used. Values range from 1 to 32768. If omitted, the
default is 1.
IntegerSS
Specifies the number of clock cycles to switch the input
clock after the switchover circuit is initiated. Values are 0
through 31. If omitted, the default is 0.
IntegerSWITCH_OVER_COUNTER
Specifies whether the gated-lock condition should initiate
a clock switch over. Values are ON or OFF. If omitted, the
value is OFF.
StringSWITCH_OVER_ON_GATED_LOCK
Specifies whether the loss-of-lock condition should initiate
a clock switch over. Values are ON or OFF. If omitted, the
value is OFF.
StringSWITCH_OVER_ON_LOSSCLK
Specifies the switchover type. Values are AUTO or MANUAL.
If omitted, the default is AUTO.
StringSWITCH_OVER_TYPE
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ALTPLL (Phase-Locked Loop) IP Core User Guide
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59
ALTPLL Parameters
ug-altpll
2014.08.18
- ALTPLL Features 1
- Types of PLLs 2
- Operation Modes 3
- Expanding the PLL Lock Range 6
- ValueOption 7
- Output Clocks 9
- Altera Corporation 10
- Send Feedback 10
- Parameter Settings 10
- Summary of PLL Output Clocks 11
- Advanced Features 12
- 2014.08.18 13
- Clock Switchover 14
- Spread-Spectrum Clocking 17
- Gated Lock and Self-Reset 18
- Related Information 19
- Programmable Bandwidth 20
- Advanced PLL Parameters 22
- PLL Dynamic Reconfiguration 23
- DescriptionOption 24
- Dynamic Phase Configuration 26
- PLL Output Counter Cascading 28
- Using the Parameter Editor 30
- Legacy parameter 32
- 3. Ignore this directory 33
- Upgrading IP Cores 34
- Ports and Parameters 38
- DescriptionConditionPort Name 39
- ALTPLL Output Ports 41
- ALTPLL Bidirectional Port 46
- ALTPLL Parameters 46
- DescriptionTypeParameter 47
- StringOPERATION_MODE 54
- Design Examples 61
- -Altera Software 64
- Document Revision History 68
- Changes MadeVersionDate 69
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