Altera DE2-70 Manual do Utilizador descarregar pdf (Página 97)

Blinking an LED

// File name: Blinky.sv

// 10Sep2013 .. initial version .. K.Metzger

module Blinky // top level module for this example

(

output LEDR[0], // signal names must match those in .qsf file

input CLOCK_50

);

logic led_bit, clk;

logic [24:0] counter; // sized to generate 0.5 second event

initial begin // initialize the start-up

led_bit = 0;

counter = 25000000-1; // count for 1/2 second at 50 MHz

end

assign clk = CLOCK_50; // connect 50 MHz clock to generic clk

assign LEDR[0] = led_bit; // connect the led_bit to RED LED 0

always_ff @(posedge clk) begin // use rising edge of the clock

counter <= counter-1; // set next counter value to current minus 1

if (counter == 0) begin // but if the counter equals 0

led_bit <= ~led_bit; // complement the led bit

counter <= 25000000-1; // reset the counter

end

endmodule

EECS 452 – Fall 2014 Lecture 5 – Page 97/143 Tuesday – September 16, 2014

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Altera DE2-70 Manual do Utilizador Página 97