Altera User Flash Memory Manual do Utilizador descarregar pdf (Página 32)

CommentsDescriptionRequiredPort Name

Data input from master

and data output from

slave.

Bidirectional clock port.Yessda

ALTUFM_NONE Ports

Input Ports

Table 29: ALTUFM_NONE Input Ports

CommentsDescriptionRequiredPort Name

(1)Clock for the address

Yesarclk

(1)Input for the address

Yesardin

(1)Shift signal for the address

Yesarshft

(1)Clock for the data register.Yesdrclk

(1)Input for the data register.Yesdrdin

(1)Shift signal for the data

Yesdrshft

(1)Signal that controls the

erase sequence.

Yeserase

If the osc port is

specified, the oscena

port is required. (1)

Signal that enables the

internal oscillator.

Nooscena

(1)Signal that initiates a

program sequence.

Noprogram

Note to Table 3–12:

1. This port is used without an interface protocol only.

Output Ports

Table 30: ALTUFM_NONE Output Ports

CommentsDescriptionRequiredPort Name

(1)Busy signal that indicates

when memory is busy.

Yesbusy

Altera User Flash Memory (ALTUFM) IP Core User Guide

Altera Corporation

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ALTUFM_NONE Ports

2014.08.18

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Altera User Flash Memory Manual do Utilizador Página 32

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