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Stratix V Advanced Systems Development Board
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Altera Stratix V Advanced Systems Development Board Manual do Utilizador Página 10
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1–6
Chapter 1:
Overview
Handling the Board
Stratix V Advanced Systems Development
Board
January 2014
Altera Cor
poration
Reference Manual
1
2
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5
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84
Reference Manual
1
Contents
3
Additional Information
4
1. Overview
5
1–2 Chapter 1: Overview
6
Dual FPGA
7
1–4 Chapter 1: Overview
8
1–6 Chapter 1: Overview
10
Handling the Board
10
2. Board Components
11
Board Overview
12
I/O Resources
16
MAX V CPLD System Controller
17
Configuration
22
MAX II CPLD EPM570F100
23
Figure 2–3. JTAG Chain
24
Note to Table 2–7:
26
Figure 2–4. PFL Configuration
27
Status Elements
28
Setup Elements
29
Board Settings DIP Switch
30
JTAG Control DIP Switch
30
MAX V Reset Push Button
31
Program Load Push Button
31
Program Select Push Button
31
CPU Reset Push Buttons
31
Clock Circuitry
32
Off-Board Clock Input/Output
34
General User Input/Output
36
User-Defined LEDs
37
FMC User-Defined LEDs
39
HSMC User-Defined LEDs
39
Components and Interfaces
40
MoSys MSR576
68
Note to Table 2–29:
75
Power Supply
76
Power Measurement
77
Temperature Sense
78
3. Board Components Reference
79
Notes to Table 3–2:
81
Note to Table:
83
Typographic Conventions
84
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