manuais Altera Serial Digital Interface (SDI) MegaCore Function

Manuais de instruções e guias do utilizador para Instrumentos de medida Altera Serial Digital Interface (SDI) MegaCore Function.
Disponibilizamos 1 manuais Altera Serial Digital Interface (SDI) MegaCore Function em pdf para descarga gratuita: Manual do Utilizador

Altera Serial Digital Interface (SDI) MegaCore Function Manual do Utilizador (140 páginas)

Marca: Altera | Categoria: Instrumentos de medida | Tamanho: 4.03 MB |

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User Guide

Contents

Chapter 4. SDI Audio IP Cores

Appendix A. Constraints

Appendix B. Clocking

Features

Release Information

Device Family Support

General Description

Notes to Table 1–5:

OpenCore Plus Evaluation

Resource Utilization

2. Getting Started

Design Flow

SDI Walkthrough

Parameterizing

Setting Up Simulation

Generating Files

- SD 270 Mbps

- HD 1.485 Gbps

- 3G 2.97 Gbps

Simulating the Design

Specifying Constraints

Multiple Channels

Compiling the Design

Programming a Device

Setting Up Licensing

3. Functional Description

Block Description

HD-SDI LN Insertion

Scrambling and NRZI Coding

Transceiver Clock

Receiver

Word Alignment

Video Timing Flags Extraction

RP168 Switching Compliance

HD-SDI LN Extraction

HD-SDI CRC Checking

Accessing Transceiver

Transmitter

Transmitter Clocks

Receiver Clocks

Notes to Table 3–5:

Notes to Figure 3–8:

Figure 3–9. Receiver Clocks

rxdata

Note to Table 3–7:

Notes to Figure 3–11:

Figure 3–12. Receiver Clocks

New TRS reasserts

Stratix IV GX

Note to Table 3–10:

Note to Table 3–11:

Notes to Figure 3–18:

Note to Figure 3–19:

User Logic

Encrypted SDI IP Core

Cyclone IV GX

Notes to Table 3–12:

Note to Table 3–13:

Note to Table 3–14:

Note to Figure 3–30:

Notes to Figure 3–33:

signal in

Table 3–18 on page 3–50

Notes to Figure 3–40:

Notes to Table 3–19:

MegaCore Verification

4. SDI Audio IP Cores

Functional Description

Note to Table 4–4:

Note to Table 4–5:

MegaCore function

100

103

Parameters

105

AES Format

109

Avalon-ST Audio Interface

109

Note to Figure 4–6:

110

Instantiating the IP Cores

111

Simulating the Testbench

112

Design Example

113

Components

114

Hardware Setup

116

D6 D7 D8 D9 D10 D11 D12 D13

118

A. Constraints

123

Notes to Figure A–1:

124

(gxb_rxclk

125

Specify Clock Characteristics

126

Set Multicycle Paths

127

337.5-MHz Zero-degree Clocks

128

Minimize Timing Skew

129

Non Cyclone Devices

130

Cyclone Devices Only

131

A–10 Appendix A: Constraints

132

B. Clocking

133

B–2 Appendix B: Clocking

134

C. Receive and Retransmit

135

Loopback FIFO Buffer

136

Additional Information

137

Info–2 Additional Information

138

Document Revision History

138

How to Contact Altera

139

Typographic Conventions

139

Info–4 Additional Information

140

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manuais Altera Serial Digital Interface (SDI) MegaCore Function

Altera Serial Digital Interface (SDI) MegaCore Function Manual do Utilizador (140 páginas)

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