Altera SDI II MegaCore Manual do Utilizador Página 20

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Design Examples on page 3-9
Each design example provided with the SDI II IP core is synthesizable.
Quartus II Help
More information about compilation in Quartus II software.
Programming an FPGA Device
After successfully compiling your design, program the targeted Altera device with the Quartus II
Programmer and verify the design in hardware.
For instructions on programming the FPGA device, refer to the Device Programming section in volume 3
of the Quartus II Handbook.
Related Information
Device Programming
Design Reference
This section describes the SDI II IP core parameters, signals, and files to help you configure your design.
This section includes detailed description about the SDI II IP core design examples.
UG-01125
2015.05.04
Programming an FPGA Device
3-5
SDI II IP Core Getting Started
Altera Corporation
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