Altera PowerPlay Early Power Estimator Manual do Utilizador descarregar pdf (Página 23)

Altera Corporation 3–7

October 2005 PowerPlay Early Power Estimator User Guide: Stratix, Stratix GX & Cyclone FPGAs

Using PowerPlay Early Power Estimator for Stratix, Stratix GX & Cyclone FPGAs

Figure 3–5. TFF Example

Figure 3–6. 4-Bit Counter Example

Figure 3–7 shows the Resource Usage Summary in the Quartus II

software Compilation Report for a design targeting the Stratix device

family. The Compilation Report provides the total number of LEs used by

the design and the average fan-out. You can view the Fitter Resource

Utilization by Entity section of the Compilation Report or use the

Hierarchies tab of the Project Navigator to determine how many LEs are

in each entity. Using this information from the Compilation Report, you

can enter in the appropriate information into the PowerPlay early power

estimator. Figure 3–8 shows the Stratix device PowerPlay early power

estimator and the estimated power consumed by the LEs in this design.

PRN

CLRN

TFF

clock

INPUT

OUTPUT

tff output

PRN

CLRN

TFF

PRN

CLRN

TFF

PRN

CLRN

TFF

PRN

CLRN

TFF

cout2

cout1

cout0

clock

cout3

OUTPUT

cout0cout0

OUTPUT

cout3cout3

OUTPUT

cout2cout2

OUTPUT

cout1cout1

1 2 ... 18 19 20 21 22 23 24 25 26 27 28 ... 39 40

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