Altera Nios II C2H Compiler Manual do Utilizador descarregar pdf (Página 123)

Altera Corporation 9.1 6–5

November 2009 Nios II C2H Compiler User Guide

Pragma Reference

Example 6–4. Interrupt Header File

#ifndef ALT_C2H_COPROCESS_IRQ_H

#define ALT_C2H_COPROCESS_IRQ_H

#include "io.h"

#include "c2h_accelerator_base_addresses.h"

#define ACCELERATOR_MY_PROJECT_COPROCESS_GET_RETURN_VALUE() \

(( int ) IORD_32DIRECT ( \

ACCELERATOR_MY_PROJECT_COPROCESS_CPU_INTERFACE0_BASE, \

(1*sizeof(int))))

#define ACCELERATOR_MY_PROJECT_COPROCESS_CLEAR_IRQ() \

( IOWR_32DIRECT ( \

ACCELERATOR_MY_PROJECT_COPROCESS_CPU_INTERFACE0_BASE, \

(0*sizeof(int)), 0))

#define ACCELERATOR_MY_PROJECT_COPROCESS_BUSY() \

( IORD_32DIRECT ( \

ACCELERATOR_MY_PROJECT_COPROCESS_CPU_INTERFACE0_BASE, \

((0*sizeof(int))) & 1) ^ 1)

#endif /* ALT_C2H_COPROCESS_IRQ_H */

The hardware accelerator does not have an IRQ level so you must open

the system in SOPC Builder and manually assign this value. After

assigning the IRQ level press the generate button because this is a change

outside of the Nios II IDE. You only have to do this manual step once. In

addition, you can use the

accelerate_my_project_coprocess_busy macro in a non-

interrupt based system in which the user code pulls for the done bit,

rather than using the automatically generated C wrapper.

f Refer to the Exception Handling chapter of the Nios II Software Developer's

Handbook for more information about creating interrupt service routines.

Unshare Pointer

Pragma

As discussed in “Resource Sharing” in the C-to-Hardware Mapping

Reference chapter, the C2H compiler automatically shares a master port

for multiple pointer dereference operations that connect to the same slave

port or group of slave ports. In certain cases, this causes a reduction in

performance. For example, in Example 6–5 both ptr_a and ptr_b must

be connected to both onchip_memory_0 and onchip_memory_1, but they

never access the same memory at the same time. By default, the C2H

compiler will attempt to share a single master between ptr_a and

ptr_b, preventing these dereference operations from being scheduled

concurrently and possibly degrading performance.

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