Altera Nios Development Board Manual do Utilizador Página 8
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viii Altera Corporation
September 2004
Contents
Clock Circuitry ..................................................................................................................................... 1–27
JTAG Connectors ................................................................................................................................. 1–28
JTAG Connector to Stratix Device (J24) ...................................................................................... 1–28
JTAG Connector to EPM7128AE Device (J5) .............................................................................. 1–29
Appendix A. Shared Bus Table
Description ............................................................................................................................................. A–1
Appendix B. Restoring the Factory Configuration
Introduction ........................................................................................................................................... B–1
Reprogramming the Flash Memory ................................................................................................... B–1
Reprogramming the EPM7128AE Configuration Controller Device ............................................ B–2
Appendix C. Connecting to the Board via Ethernet
Introduction ........................................................................................................................................... C–1
Connecting the Ethernet Cable ........................................................................................................... C–1
Connecting the LCD Screen ................................................................................................................ C–2
Obtaining an IP Address ..................................................................................................................... C–2
LAN Connection .............................................................................................................................. C–2
DHCP ........................................................................................................................................... C–2
Static IP Address ........................................................................................................................ C–3
Point–to–Point Connections .......................................................................................................... C–4
Browsing Your Board ........................................................................................................................... C–5
Index
- Nios Development Board 1
- MNL-N2DEVLBDSTX-1.1 2
- About this Manual 3
- How to Contact 4
- Typographic 5
- Conventions 5
- September 2004 6
- Contents 7
- Block Diagram 10
- Default Reference Design 10
- Development 11
- Components 11
- The Stratix 12
- EP1S10 Device 12
- Flash Memory 12
- Connector 13
- CompactFlash 13
- Pins on CompactFlash 15
- SDRAM Device 16
- Dual SRAM 18
- Altera Corporation 1–11 19
- Board Components 19
- Altera Corporation 1–13 21
- Expansion 22
- Prototype 22
- (PROTO2) 22
- Altera Corporation 1–15 23
- Altera Corporation 1–17 25
- Serial Port 26
- Connectors 26
- Dual 7-Segment 27
- Push-Button 28
- Switches 28
- Individual LEDs 28
- Configuration 29
- Controller 29
- (EPM7128AE) 29
- 1–22 Altera Corporation 30
- The Configuration-Status LEDs 32
- SW8 – CPU Reset 33
- Power-Supply 34
- Circuitry 34
- Clock Circuitry 35
- JTAG Connectors 36
- ° compared to J24 37
- 1–30 Altera Corporation 38
- Appendix A. Shared Bus Table 39
- Shared Data 40
- A–4 Altera Corporation 42
- September 2004 42
- Description 42
- Appendix B. Restoring the 43
- Factory Configuration 43
- Reprogramming 44
- Appendix C. Connecting to the 45
- Board via Ethernet 45
- Connecting the 46
- LCD Screen 46
- Obtaining an IP 46
- Static IP Address 47
- Point–to–Point Connections 48
- Browsing Your 49
- C–6 Altera Corporation 50
- Browsing Your Board 50
- Altera Corporation Index–1 51
- Index–2 Altera Corporation 52
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