
1–10 Altera Corporation
Nios Development Board Reference Manual, Stratix Edition September 2004
Dual SRAM Devices
f See www.micron.com for detailed SDRAM information.
Dual SRAM
Devices
U35 and U36 are two 512 Kbyte x 16-bit asynchronous SRAM devices.
They are connected to the Stratix device so they can be used by a NiosII
embedded processor as general-purpose memory. The two 16-bit devices
can be used in parallel to implement a 32-bit wide memory subsystem.
DQ16 31 AG8
DQ17 33 AF8
DQ18 34 AD8
DQ19 36 AH9
DQ20 37 AH8
DQ21 39 AE9
DQ22 40 AF9
DQ23 42 AG9
DQ24 45 AD10
DQ25 47 AF10
DQ26 48 AH10
DQ27 50 AE10
DQ28 51 AF11
DQ29 53 AE11
DQ30 54 AH11
DQ31 56 AG11
DQM0 16 AE14
DQM1 71 Y13
DQM2 28 AE7
DQM3 59 AG10
RAS_N 19 AH3
CAS_N 18 AD18
CKE 67 AE18
CS_N 20 AG18
WE_N 17 AH19
CLK 68 L13
Table 1–3. SDRAM (U57) Pin Table (Part 2 of 2)
Pin Name Pin Number Connects to Stratix Pin
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