
2–27 Altera Corporation
LCD Multimedia HSMC August 2008
Interfaces/ Connectors
1 On the LCD Multimedia HSMC users still need to multiplex the
VGA synchronization and RGB data to fit the VGA TDM block
input timing as mentioned in Figure 2–6 and Figure 2–7. The
timing protocol of the VGA TDM controller is similar to the
LCD
TDM controller. The input color data bus HC_VGA_DATA
changes from 8-bit to 10-bit, and the VGA TDM controller uses
the HC_VGA_HS to determine the position of the BLUE color
sample.
Figure 2–15. V.G.A. Horizontal Timing Specification
Table 2–20. VGA Horizontal Timing Specification
Configuration Resolution(HxV) a(us) b(us) c(us) d(us) Pixel clock(Mhz)
VGA(60Hz) 640x480 3.8 1.9 25.4 0.6 25 (640/c)
VGA(85Hz) 640x480 1.6 2.2 17.8 1.6 36 (640/c)
SVGA(60Hz) 800x600 3.2 2.2 20 1 40 (800/c)
SVGA(75Hz) 800x600 1.6 3.2 16.2 0.3 49 (800/c)
SVGA(85Hz) 800x600 1.1 2.7 14.2 0.6 56 (800/c)
XGA(60Hz) 1024x768 2.1 2.5 15.8 0.4 65 (1024/c)
XGA(70Hz) 1024x768 1.8 1.9 13.7 0.3 75 (1024/c)
XGA(85Hz) 1024x768 1.0 2.2 10.8 0.5 95 (1024/c)
1280x1024(60Hz) 1280x1024 1.0 2.3 11.9 0.4 108 (1280/c)
Table 2–21. VGA Vertical Timing Specification
Configuration Resolution (HxV) a(lines) b(lines) c(lines) d(lines)
VGA(60Hz) 640x480 2 33 480 10
VGA(85Hz) 640x480 3 25 480 1
SVGA(60Hz) 800x600 4 23 600 1
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