
Altera Corporation iii
August 2008 Preliminary
Contents
Chapter 1. Overview
General Description ............................................................................................................................... 1–1
Components and Block Diagram ................................................................................................... 1–3
Block Diagram .................................................................................................................................. 1–4
Chapter 2. Board Components and Interfaces
Board Overview ..................................................................................................................................... 2–1
Interface Device ..................................................................................................................................... 2–4
MAX II CPLD-EPM2210F324 (U4) ................................................................................................. 2–4
Block Diagram of bus-controller logic in the MAX II CPLD ..................................................... 2–6
Level Translator ..................................................................................................................................... 2–8
Bidirectional level shift interface .................................................................................................... 2–8
Display .................................................................................................................................................. 2–10
LCD Touch Panel Display ............................................................................................................. 2–10
Interfaces/Connectors ........................................................................................................................ 2–15
Audio Codec Interface ................................................................................................................... 2–15
SD Card ............................................................................................................................................ 2–17
Ethernet PHY .................................................................................................................................. 2–19
RS232 Serial Interface ..................................................................................................................... 2–21
PS/2 Interface ................................................................................................................................. 2–22
Video Decoder Interface ................................................................................................................ 2–23
NTSC PAL Video Decoder Circuit .............................................................................................. 2–25
VGA DAC Interface ....................................................................................................................... 2–26
Clocking Circuitry ............................................................................................................................... 2–30
Power Supply ....................................................................................................................................... 2–31
Power Supplies ............................................................................................................................... 2–31
EEPROM ............................................................................................................................................... 2–32
I2C Serial EEPROM ........................................................................................................................ 2–32
Expansion Interface ............................................................................................................................. 2–34
HSMC Interface .............................................................................................................................. 2–34
Statement of China-RoHS Compliance ............................................................................................ 2–35
Appendix A. Pin Connections HSMC.FPGA for the Cyclone III Starter Board
Introduction ........................................................................................................................................... A–1
Additional Information
Revision History ......................................................................................................................................... i
How to Contact Altera ............................................................................................................................... i
Typographic Conventions ......................................................................................................................... i
Comentários a estes Manuais