
Altera Corporation A–5
HardCopy II Clock Uncertainty Calculator User Guide
Figure A–5 shows an example of a clock-pair = CLK8 to CLK10
Figure A–5. Inter-Clock Domain with a PLL on the Source Clock
Table A–5 shows input of the PLL index for Figure A–5, with respect to
the source and destination clocks.
INBUF
CLK8
CLK10
Source
Clock
Destination
Clock
Source
Regist
Destination
Register
PLL3
Table A–5. Location of Input PLLs
Source Clock Destination Clock
1st PLL 2nd PLL 1st PLL 2nd PLL
3—0—
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