Altera Cyclone V GT FPGA Manual do Utilizador descarregar pdf (Página 33)

Chapter 6: Board Test System 6–11

Using the Board Test System

September 2014 Altera Corporation Cyclone V GT FPGA Development Kit

User Guide

Figure 6–7 shows the DDR3x64 tab. Except for the tab name and photograph, this tab

is identical to the DDR3x40 tab.

The following sections describe the controls on the DDR3x40 and DDR3x64 tabs.

Start

Initiates DDR3 memory transaction performance analysis.

Stop

Terminates the transaction performance analysis.

Performance Indicators

Display current transaction performance analysis information collected since you last

clicked Start:

■ Write, Read, and To tal performance bars—Show the percentage of the maximum

theoretical data rate that the requested transactions are able to achieve.

Figure 6–7. The DDR3x64 Tab

1 2 ... 28 29 30 31 32 33 34 35 36 37 38 ... 49 50

Sem comentários

Altera Cyclone V GT FPGA Manual do Utilizador Página 33