Altera Cyclone IV GX Transceiver Starter Board Manual do Utilizador descarregar pdf (Página 10)

2–2 Chapter 2: Board Components

Board Overview

Cyclone IV GX Transceiver Starter Board Reference Manual © March 2010 Altera Corporation

Table 2–1 describes the components and lists their corresponding board references.

Figure 2–1. Overview of the Cyclone IV GX Transceiver Starter Board Features

Clock Input

SMAs

Connector

(J2, J3)

Max II Reset

Push-Button

Switch (S3)

PGM Select

Push-Button

Switch

(S2)

DC Input

Jack (J4)

Cyclone

IV GX

FPGA

(U8)

Character

LCD

(J6)

CPU Reset

Push-Button

Switch (S4)

Power Switch

(SW1)

Transceiver

TX SMA

Connectors

(J10, J11)

Ethernet

LEDs

(D14-D18)

MAX II

CPLD

EPM2210

System

Controller

(U10)

User

LEDs

(D5-D8)

Flash x16

Memory (U11)

PCI Express

Edge

Connector

(U14)

USB Type-B

Connector (J5)

Gigabit

Ethernet

Por t

(J16)

JTAG

Connector

(J1)

SSRAM x18

Memory

(U12)

Error and

Configuration

Done

LEDs

(D1, D2)

PGM

Configure

Push-Button

Switch (S1)

Power LED

(D12)

Transceiver

RX SMA

Connectors

(J8, J9)

User

Push-Button

Switches (S5, S6)

MAX II

CPLD

EPM240

Embedded

USB-Blaster

(U4)

Resistor

Multiplexer

(R52, R53)

Capacitor

Multiplexer

(C58, C59)

Table 2–1. Cyclone IV GX Transceiver Starter Board Components (Part 1 of 3)

Board Reference Type Description

Featured Devices

U8 FPGA EP4CGX15BF14, 169-pin FBGA.

U10 CPLD EPM2210F256, 256-pin FBGA.

Configuration, Status, and Setup Elements

J5 USB Type-B connector Connects to the computer to enable embedded USB-Blaster JTAG.

J13 JTAG chain header Enables and disables devices in the JTAG chain.

S8 Board settings DIP switch Controls the MAX II CPLD EPM2210 System Controller functions

such as clock select, SMA clock input control, and which image to

load from flash memory at power-up. This switch is located at the

bottom of the board.

J1 JTAG connector Disables embedded blaster (for use with external USB-Blasters).

U15 EPCS128 serial configuration

device

Flash memory device with a serial interface which stores

configuration data for FPGA device that supports active serial

configuration and reloads the data to the FPGA upon power-up or

reconfiguration.

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