Altera Signal Integrity Development Kit, Stratix V GX Edi Manual do Utilizador descarregar pdf (Página 36)

6–16 Chapter 6: Board Test System

Using the Board Test System

Transceiver Signal Integrity Development Kit July 2012 Altera Corporation

Stratix V GX Edition User Guide

■ PRBS31—pseudo-random 31-bit sequences

■ HF1—highest frequency divide-by-2 data pattern "10101010"

■ HF2—next highest frequency divide-by-6 data pattern "111000111000"

■ HF3—second lowest frequency divide-by-22 data pattern

■ LF —lowest frequency divide by 33 data pattern

1 Settings HF1, HF2, HF3, LF are for transmit observation only and are not

used in the receiver data detection circuitry.

Error Control

This control displays data errors detected during analysis and allows you to insert

errors:

■ Detected errors—Displays the number of data errors detected in the hardware.

■ Inserted errors—Displays the number of errors inserted into the transmit data

stream.

■ Insert Error—Inserts a one-word error into the transmit data stream each time you

click the button. Insert Error is only enabled during transaction performance

analysis.

■ Clear—Resets the Detected errors and Inserted errors counters to zeros.

Loopback

■ TX and RX performance bars—Show the percentage of maximum theoretical data

rate that the requested transactions are able to achieve.

■ Start—This control initiates the loopback tests.

■ Stop—This control terminates the loopback tests.

■ Tx (MBps) and Rx (MBps)—Show the number of bytes of data analyzed per

second.

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Altera Signal Integrity Development Kit, Stratix V GX Edi Manual do Utilizador Página 36