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Appendix A: Pin-Out Information for the Cyclone III (3C120) Development Board A–7

101 LVDS TX 8p or CMOS I/O data bit 40 DA13 HSMB_TX_D_P8 LVDS or

2.5 V

V25

102 LVDS RX 8p or CMOS I/O data bit 41 DB13 HSMB_RX_D_P8 LVDS or

2.5 V

P21

103 LVDS TX 8n or CMOS I/O data bit 42 DA12 HSMB_TX_D_N8 LVDS or

2.5 V

V26

104 LVDS RX 8n or CMOS I/O data bit 43 DB12 HSMB_RX_D_N8 LVDS or

2.5 V

R21

107 LVDS TX 9p or CMOS I/O data bit 44 DA11 HSMB_TX_D_P9 LVDS or

2.5 V

W25

108 LVDS RX 9p or CMOS I/O data bit 45 DB11 HSMB_RX_D_P9 LVDS or

2.5 V

R22

109 LVDS TX 9n or CMOS I/O data bit 46 DA10 HSMB_TX_D_N9 LVDS or

2.5 V

W26

110 LVDS RX 9n or CMOS I/O data bit 47 DB10 HSMB_RX_D_N9 LVDS or

2.5 V

R23

113 LVDS TX 10p or CMOS I/O data bit 48 DA9 HSMB_TX_D_P10 LVDS or

2.5 V

Y25

114 LVDS RX 10p or CMOS I/O data bit 49 DB9 HSMB_RX_D_P10 LVDS or

2.5 V

T25

115 LVDS TX 10n or CMOS I/O data bit 50 DA8 HSMB_TX_D_N10 LVDS or

2.5 V

Y26

116 LVDS RX 10n or CMOS I/O data bit 51 DB8 HSMB_RX_D_N10 LVDS or

2.5 V

T26

119 LVDS TX 11p or CMOS I/O data bit 52 DA7 HSMB_TX_D_P11 LVDS or

2.5 V

AA25

120 LVDS RX 11p or CMOS I/O data bit 53 DB7 HSMB_RX_D_P11 LVDS or

2.5 V

U27

121 LVDS TX 11n or CMOS I/O data bit 54 DA6 HSMB_TX_D_N11 LVDS or

2.5 V

AA26

122 LVDS RX 11n or CMOS I/O data bit 55 DB6 HSMB_RX_D_N11 LVDS or

2.5 V

U28

125 LVDS TX 12p or CMOS I/O data bit 56 DA5 HSMB_TX_D_P12 LVDS or

2.5 V

AB25

126 LVDS RX 12p or CMOS I/O data bit 57 DB5 HSMB_RX_D_P12 LVDS or

2.5 V

U22

127 LVDS TX 12n or CMOS I/O data bit 58 DA4 HSMB_TX_D_N12 LVDS or

2.5 V

AB26

128 LVDS RX 12n or CMOS I/O data bit 59 DB4 HSMB_RX_D_N12 LVDS or

2.5 V

V22

Table A–2.

HSMC Port B Interface Pin-Out Information (Part 3 of 4)

Data Conversion HSMC Schematic Development Board Schematic

Board

Reference

(J1) Description

Schematic

Signal Name

Schematic

Signal Name

I/O

Standard

Cyclone

III

Number

1 2 ... 26 27 28 29 30 31 32 33 34 35 36 ... 43 44

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