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4–41 Chapter 4: Functional Description
ALTDQ_DQS Megafunction Ports
ALTDLL and ALTDQ_DQS Megafunctions User Guide © February 2012 Altera Corporation
dq_output_reg_clkena Input Optional V
CC
This port feeds the output enable signal for the
<IO>_OUTPUT_FF:ena and
<IO>_OUTPUT_DDIO_OUT:ena ports.
output_dq_areset
[n
o
-1..0]
Input Optional GND This port is connected to all areset port in the
output DQ IO primitives that is used to
asynchronously reset the registers in those
primitives.
output_dq_hr_output_
data_in[4*n
o
-1..0]
Input Optional GND This port feeds the half-rate DDR output DQ signal
for the
OUTPUT_DQ_OUTPUT_HR_DDIO_OUT_HIGH
:datainhi / datainlo and
OUTPUT_DQ_OUTPUT_HR_DDIO_OUT_LOW:
datainhi / datainlo ports.
output_dq_output_data_
in_high[n
o
-1..0]
Input Optional GND This port feeds the full-rate DDR output DQ signal
(rising edge) for the
OUTPUT_DQ_OUTPUT_DDIO_OUT:datainh
i port.
output_dq_output_data_
in_low[n
o
-1..0]
Input Optional GND This port feeds the full-rate DDR output DQ signal
(falling edge) for the
OUTPUT_DQ_OUTPUT_DDIO_OUT:datainl
o port.
output_dq_output_data_
in[n
o
-1..0]
Input Optional GND This port feeds the output DQ signal for the
OUTPUT_DQ_OUTPUT_FF:d,
OUTPUT_DQ_OUTPUT_DELAY_CHAIN1:dat
ain,
OUTPUT_DQ_OUTPUT_DELAY_CHAIN2:dat
ain, or output_dq_output_data_out
port.
output_dq_output_data_
out[n
o
-1..0]
Output Optional — This port outputs the output DQ signal from the
OUTPUT_DQ_OUTPUT_DELAY_CHAIN2:dat
aout,
OUTPUT_DQ_OUTPUT_DELAY_CHAIN1:dat
aout, OUTPUT_DQ_OUTPUT_FF:q,
OUTPUT_DQ_OUTPUT_DDIO_OUT:dataout,
or output_dq_output_data_in port.
output_dq_sreset
[n
o
-1..0]
Input Optional GND This port is connected to all sreset ports in the
output DQ IO primitives that is used to
synchronously reset the registers in those
primitives.
Table 4–16. Megafunction Ports to Configure DQ Output Path (Part 2 of 2)
Port Name Type
Optional/
Required Default Description
- ALTDLL and ALTDQ_DQS 1
- Megafunctions User Guide 1
- UG-01032-5.0 2
- Contents 3
- 1. About these Megafunctions 5
- Features 6
- 2. Getting Started 7
- ALTOCT Megafunction 8
- Customized Controller Logic 8
- Simulate the Design 9
- Create Timing Constraints 9
- Adjust Constraints 10
- Generate the Megafunctions 11
- Settings Value 13
- Turned off 14
- Enable DQS delay chain 14
- 3. Parameter Settings 19
- [5..0] output port 20
- ALTDLL Parameter Editor 21
- ALTDQ_DQS Parameter Editor 23
- Reset/Config Ports 26
- ports on the megafunction 27
- — DQS_OFFSETCTRL_ 27
- inputs to be registered by 28
- signals of 28
- “DQ Input Path” on page 4–8 29
- 4. Functional Description 37
- ■ DQS Input Path 38
- ■ DQ Input Path 38
- ■ DQ Output/OE Path 38
- ■ DQS Output/OE Path 38
- ■ DQ/DQS OCT Path 38
- ALTDLL Megafunction 39
- ALTDQ_DQS Megafunction 40
- DQS Input Path 42
- DQ Input Path 44
- DQ Output/OE Path 46
- DQS Output/OE Path 48
- DQ/DQS OCT Path 50
- Delay Chains 51
- Deskew Delay Chains 52
- Note to Figure 4–13: 55
- Note to Figure 4–14: 55
- Note to Figure 4–15: 56
- Note to Figure 4–16: 56
- Note to Figure 4–17: 57
- DQS_CONFIG / IO_CONFIG Block 58
- ALTDLL Megafunction Ports 67
- ALTDQ_DQS Megafunction Ports 69
- DQ OE Path Megafunction Ports 78
- DQSn I/O Path Ports 79
- DQS_CONFIG/IO_CONFIG path 81
- RLDRAM interfaces 84
- Procedure 85
- 00 FF 00 FF 99
- ■ bidir_dq_io[0] 100
- A. Clear Box Generator 102
- Clear Box Generator Options 103
- Clear Box Parameters 104
- inputs are 108
- OUTPUT_DQ 114
- Additional Information 116
- Typographic Conventions 117
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